Asynchronous Systems Research Group

asrg_dali

ASRG

Introduction
Research Group Memebers
Technical Papers
Asynchronous Links

Introduction

At ASRG, students and professors conduct research in the emerging field of asynchronous VLSI system design. Here we attempt to address both the theoretical aspects of asynchronous system design, as well as applying that theory to design high-performance and low-power VLSI ASICs.

This work is currently proceeding in …

  • An Asynchronous Discrete Cosine Transform Processor : The DCT
    plays a central role in many of today’s popular image compression
    algorithms. This investigation presents a highly pipelined
    architecture with asynchronous control circuitry.
  • A Field Programmable Gate Array for implementing self-timed
    circuits : PGA-STC will implement asynchronous circuits
    optimally and has the capability to handle the various hazards that
    asynchronous design introduces.
  • Fast Radix-4 Floating Point Divider using self-timed techniques.
  • Asynchronous Dispatch Stack (ADS): Counterflow pipeline
    based dynamic insruction scheduling techniques for asynchronous
    superscalar processors.
  • Dynamic Clock Gating methodologies.

Research Group Members

Venkatesh Akella
Jonathan B. Lipsher
Kapilan Maheswaran
David Johnson
Tony Werner
Robert Gluss
Navjyot Birak
Brett Stott
Nithya Raghavan

Technical Papers

Asynchronous Links

Eindhoven University of Technology, Netherlands
     Parallelism & Algorithms
University of Edinburgh
     Asynchronous/Self-timed FPGA systems
University of Manchester, England
     AMULET: First asynchronous implementation of a commercial microprocessor (ARM)
University of Manitoba, Canada
     Another Asynchronous Multiplier on the Xilinx FPGA
University of Utah
     VLSI Architectures & CAD for VLSI Architechtures
University of Washington
     MONTAGE: First FPGA for asynchronous circuits
University of Waterloo, Canada
     Models & Algorithms for Synthesis, Verification, and Testing of Integrated Circuits
Other Asynchronous Logic Groups
Professor Venkatesh Akella / Department of Electrical and Computer
Engineering / University of California / Davis, CA 95616 /
akella@ece.ucdavis.edu

 

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