3 units – Winter Quarter
Lecture: 3 hours
Prerequisite: EEC 118
Grading: Letter; homework (15%), midterm (25%), design project #1 (20%) and final project/design project #2 (40%).
IC design for low power and energy consumption. Low power architectures, logic styles and circuit design. Variable supply and threshold voltages. Leakage management. Power estimation. Energy sources, power electronics, and energy recovery. Applications in portable electronics and sensors. Thermodynamic limits.
Expanded Course Description:
Design Project #1 typically involves optimizing a particular logic block for both power and performance. Example circuits include 32-bit adders, 4×4 array multipliers, or an SRAM data cache critical path. Projects involve logic design, transistor level circuit design, simulation and verification using a Spice-like circuit simulator such as Hspice, and preparation of a written report with an emphasis on design discussion. Design Project #2 Final Project allows students to pursue their own small research projects in various aspects of low power digital integrated circuit design. Examples include modeling power dissipation for routing fabrics, designing low-swing or encoded on-chip interconnects, and exploring low leakage power cache designs. Students are required to perform some circuit or logic design and analysis. Designs are verified through simulation using a Hardware Description Language such as Verilog or circuit simulator such as Hspice. Students give a brief class presentation and submit a final report in a conference paper format.
Most material will be from classic and recent research papers on low power design.