4 units – Spring Quarter
Lecture: 3 hours
Laboratory: 3 hours
Prerequisite: EEC 110A, EEC 180A
Analysis and design of digital integrated circuits. The emphasis is on MOS logic circuit families. Logic gate construction, voltage transfer characteristics, and propagation delay. Regenerative circuits, RAM’s, ROM’s, and PLA’s.
Expanded Course Description:
Labs consist of three-hour experiments that reinforce the lecture material, provide hands-on experience with test equipment, CAD tools, and simulators, and require some design calculations.
Students will use SPICE and/or Cadence tools to complere several laboratory exercises. These include the transistor-level design and simulation of combinational and sequencial logic elements, arithmetic structures, and memory cells.
Engineering Design Statement:
Digital integrated circuit design will be covered with an emphasis on MOS. Topics will include: the MOS transistor operation, large signal models, MOS gates, propagation delay calculation, regenerative circuits and sequential elements, ROM, PLA, RAM. There will be three-hour laboratories approximately each week. Some laboratories. involve physical experiments and others rely on circuit simulation. The course teaches digital transistor-level circuit design, discussing trade-offs in speed, area, robustness, and power that can be realized by transistor sizing, choice of circuit topology, clocking methodology, etc.
Relationship to Outcomes:
Students who have successfully completed this course should have achieved:
|Course Outcomes||ABET outcomes|
|An ability to apply knowledge of mathematics, science, and engineering||A|
|An ability to design and conduct experiments, as well as to analyze and interpret data||B|
|An ability to identify, formulate, and solve engineering problems||E|
|An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.||K|
Engineering Science: 2 credits
Engineering Design: 2 credits